/**
 * @file    gt98xx_drv_uart.h
 * @author  Giantec-Semi ATE
 * @brief   Header file of UART driver module.
 * @version 0.1
 * 
 * @copyright Copyright (c) 2021 Giantec-Semi
 */

#ifndef GT98XX_DRIVERS_GT98XX_DRV_UART_H_
#define GT98XX_DRIVERS_GT98XX_DRV_UART_H_

#ifdef __cplusplus
  extern "C" {
#endif /* __cplusplus */

#include "gt98xx_drv_def.h"
#include "gt98xx_drv_conf.h"

/**
 * @addtogroup GT9881_Drivers
 * @{
 */

/**
 * @defgroup UART_DRV UART Drivers
 * @{
 */

/**
 * @defgroup UART_DRV_Private_Macros UART Drivers Private Macros
 * @{
 */
/** @} UART_DRV_Private_Macros */

/**
 * @defgroup UART_DRV_Exported_Types UART Drivers Exported Types
 * @{
 */

/**
 * @struct DrvUartInitTypedef
 * @brief UART drivers init structure definition
 */
typedef struct tagDrvUartInitTypedef {
  uint32_t baud_rate;       ///< Baud rate
  uint32_t data_width;      ///< Data width
  uint32_t stop_bits;       ///< Stop bits
  uint32_t parity;          ///< Parity
} DrvUartInitTypedef;
/** @} UART_DRV_Exported_Types */

/**
 * @defgroup UART_DRV_Exported_Constants UART Drivers Exported Constants
 * @{
 */

/**
 * @defgroup UART_DRV_EC_Parity Parity Control
 * @{
 */
#define DRV_UART_PARITY_NONE                (0x00000000U)                   ///< No parity 
#define DRV_UART_PARITY_ODD                 (UART_LCR_PEN)                  ///< Odd parity 
#define DRV_UART_PARITY_EVEN                (UART_LCR_PEN | UART_LCR_EPS)   ///< Even parity 
/** @} UART_DRV_EC_Parity */

/**
 * @defgroup UART_DRV_EC_DataWidth Data Width Control
 * @{
 */
#define DRV_UART_DATAWIDTH_5B               (0x00000000U)             ///< Data Width 5 bits 
#define DRV_UART_DATAWIDTH_6B               (0x00000001U)             ///< Data Width 6 bits 
#define DRV_UART_DATAWIDTH_7B               (0x00000002U)             ///< Data Width 7 bits 
#define DRV_UART_DATAWIDTH_8B               (0x00000003U)             ///< Data Width 8 bits 
/** @} UART_DRV_EC_DataWidth */

/**
 * @defgroup UART_DRV_EC_StopBits Stop Bits Control
 * @{
 */
#define DRV_UART_STOPBITS_1                 (0x00000000U)             ///< Stop Bits 1 
#define DRV_UART_STOPBITS_1_5               (UART_LCR_STOP)           ///< Stop Bits 1.5
#define DRV_UART_STOPBITS_2                 DRV_UART_STOPBITS_1_5     ///< Stop Bits 2 
/** @} UART_DRV_EC_StopBits */

/** @} UART_DRV_Exported_Constants */

/**
 * @defgroup UART_DRV_Exported_Macros UART Drivers Exported Macros
 * @{
 */

/** @} UART_DRV_Exported_Macros */

/**
 * @defgroup UART_DRV_Exported_Functions UART Drivers Exported Functions
 * @{
 */

/**
 * @defgroup UART_DRV_EF_Configuration UART Configuration Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE void DrvUartSetParity(UartTypedef* uart_instance, uint32_t parity)
 * @brief Set parity (enabled/disabled and parity mode if enabled)
 * 
 * @param[in] uart_instance UART instance
 * @param[in] parity This parameter can be one of the following values:
 *        @arg @ref DRV_UART_PARITY_NONE
 *        @arg @ref DRV_UART_PARITY_ODD
 *        @arg @ref DRV_UART_PARITY_EVEN
 */
__STATIC_INLINE void DrvUartSetParity(UartTypedef* uart_instance, uint32_t parity) {
  MODIFY_REG(uart_instance->LCR, UART_LCR_PEN | UART_LCR_EPS, parity);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartGetParity(UartTypedef* uart_instance)
 * @brief Get parity configuration(enabled/disabled and parity mode if enabled)
 * 
 * @param[in] uart_instance UART instance
 * @return UART parity mode
 * @retval DRV_UART_PARITY_NONE None parity
 * @retval DRV_UART_PARITY_ODD Odd parity
 * @retval DRV_UART_PARITY_EVEN Even parity
 */
__STATIC_INLINE uint32_t DrvUartGetParity(UartTypedef* uart_instance) {
  return (uint32_t)READ_BIT(uart_instance->LCR, UART_LCR_PEN | UART_LCR_EPS);
}

/**
 * @fn __STATIC_INLINE void DrvUartSetDataWidth(UartTypedef* uart_instance, uint32_t data_width)
 * @brief Set data width
 * 
 * @param[in] uart_instance UART instance
 * @param[in] data_width This parameter can be one of the following values:
 *        @arg @ref DRV_UART_DATAWIDTH_5B
 *        @arg @ref DRV_UART_DATAWIDTH_6B
 *        @arg @ref DRV_UART_DATAWIDTH_7B
 *        @arg @ref DRV_UART_DATAWIDTH_8B
 */
__STATIC_INLINE void DrvUartSetDataWidth(UartTypedef* uart_instance, uint32_t data_width) {
  MODIFY_REG(uart_instance->LCR, UART_LCR_DLS, data_width);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartGetDataWidth(UartTypedef* uart_instance)
 * @brief Get data width
 * 
 * @param[in] uart_instance UART instance
 * @return UART data width
 * @retval DRV_UART_DATAWIDTH_5B 5 bits data width
 * @retval DRV_UART_DATAWIDTH_6B 6 bits data width
 * @retval DRV_UART_DATAWIDTH_7B 7 bits data width
 * @retval DRV_UART_DATAWIDTH_8B 8 bits data width
 */
__STATIC_INLINE uint32_t DrvUartGetDataWidth(UartTypedef* uart_instance) {
  return (uint32_t)READ_BIT(uart_instance->LCR, UART_LCR_DLS);
}

/**
 * @fn __STATIC_INLINE void DrvUartSetStopBitsLength(UartTypedef* uart_instance, uint32_t stop_bits)
 * @brief Set the length of stop bits
 * 
 * @param[in] uart_instance UART instance
 * @param[in] stop_bits This parameter can be one of the following values:
 *        @arg @ref DRV_UART_STOPBITS_1
 *        @arg @ref DRV_UART_STOPBITS_1_5
 *        @arg @ref DRV_UART_STOPBITS_2
 */
__STATIC_INLINE void DrvUartSetStopBitsLength(UartTypedef* uart_instance, uint32_t stop_bits) {
  MODIFY_REG(uart_instance->LCR, UART_LCR_STOP, stop_bits);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartGetStopBitsLength(UartTypedef* uart_instance)
 * @brief Return the length of the stop bits
 * 
 * @param[in] uart_instance UART instance
 * @return UART stop bits
 * @retval DRV_UART_STOPBITS_1 stop bits = 1
 * @retval DRV_UART_STOPBITS_1_5 stop bits = 1.5(when data length is 5 bits) or 2
 * @retval DRV_UART_STOPBITS_2 stop bits = 1.5(when data length is 5 bits) or 2
 */
__STATIC_INLINE uint32_t DrvUartGetStopBitsLength(UartTypedef* uart_instance) {
  return (uint32_t)READ_BIT(uart_instance->LCR, UART_LCR_STOP);
}

/**
 * @fn __STATIC_INLINE void DrvUartSetBaudRate(UartTypedef* uart_instance, uint32_t baud_rate)
 * @brief Configure UART DLL and DLH registers for achieving expected baud rate value
 * 
 * @param[in] uart_instance UART instance
 * @param[in] baud_rate Baud rate
 */
__STATIC_INLINE void DrvUartSetBaudRate(UartTypedef* uart_instance, uint32_t baud_rate) {
  if (baud_rate) {
    uint32_t apbdiv = READ_BIT(CLK_CTL_REG->MCU_CLK_CFG,MCU_CLK_CFG_APB_DIV) >> MCU_CLK_CFG_APB_DIV_Pos;
    switch (apbdiv)
    {
    case 00:
      SystemCoreClock >>= 0;
      break;
    case 01:
      SystemCoreClock >>= 1;
      break;
    case 03:
      SystemCoreClock >>= 2;
      break;
    case 07:
      SystemCoreClock >>= 3;
      break;
    case 15:
      SystemCoreClock >>= 4;
      break;
    default:
      SystemCoreClock >>= 1;
      break;
    }
    uint32_t value = (SystemCoreClock >> 4) / baud_rate;
    SET_BIT(uart_instance->LCR, UART_LCR_DLAB);
    WRITE_REG(uart_instance->RBR_THR_DLL, value & 0xFF);
    WRITE_REG(uart_instance->DLH_IER, (value >> 8) & 0xFF);
    CLEAR_BIT(uart_instance->LCR, UART_LCR_DLAB);
  }
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartGetBaudRate(UartTypedef* uart_instance)
 * @brief Get current baud rate value
 * 
 * @param[in] uart_instance UART instance
 * @return Baud rate
 */
__STATIC_INLINE uint32_t DrvUartGetBaudRate(UartTypedef* uart_instance) {
  uint32_t divisor_latch_value;
  uint32_t apbdiv = READ_BIT(CLK_CTL_REG->MCU_CLK_CFG,MCU_CLK_CFG_APB_DIV) >> MCU_CLK_CFG_APB_DIV_Pos;
    switch (apbdiv)
    {
    case 00:
      SystemCoreClock >>= 0;
      break;
    case 01:
      SystemCoreClock >>= 1;
      break;
    case 03:
      SystemCoreClock >>= 2;
      break;
    case 07:
      SystemCoreClock >>= 3;
      break;
    case 15:
      SystemCoreClock >>= 4;
      break;
    default:
      SystemCoreClock >>= 1;
      break;
    }
  SET_BIT(uart_instance->LCR, UART_LCR_DLAB);
  divisor_latch_value = READ_REG(uart_instance->DLH_IER) << 8;
  divisor_latch_value += READ_REG(uart_instance->RBR_THR_DLL);
  CLEAR_BIT(uart_instance->LCR, UART_LCR_DLAB);

  return (SystemCoreClock >> 4) / divisor_latch_value;
}

/** @} UART_DRV_EF_Configuration */

/**
 * @defgroup UART_DRV_EF_Flag_Management UART Flag Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsDataReadyActive(UartTypedef* uart_instance)
 * @brief Check if the UART receiver contains at lease one character in the RBR
 * 
 * @param[in] uart_instance UART instance
 * @return Data ready bit
 * @retval 0 No data ready
 * @retval 1 Data ready
 */
__STATIC_INLINE uint32_t DrvUartIsDataReadyActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_DR)  >> UART_LSR_DR_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsOverrunErrorActive(UartTypedef* uart_instance)
 * @brief Check if there is an overrun error
 * 
 * @param[in] uart_instance UART instance
 * @return Overrun error bit
 * @retval 0 No overrun error
 * @retval 1 Overrun error
 */
__STATIC_INLINE uint32_t DrvUartIsOverrunErrorActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_OE) >> UART_LSR_OE_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsParityErrorActive(UartTypedef* uart_instance)
 * @brief Check if there is a parity error
 * 
 * @param[in] uart_instance UART instance
 * @return Parity error bit
 * @retval 0 No parity error
 * @retval 1 Parity error
 */
__STATIC_INLINE uint32_t DrvUartIsParityErrorActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_PE) >> UART_LSR_PE_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsFramingErrorActive(UartTypedef* uart_instance)
 * @brief Check if there is a framing error in the receiver
 * 
 * @param[in] uart_instance UART instance
 * @return Framing error bit
 * @retval 0 No framing error
 * @retval 1 Framing error reading the LSR clears the FE bit
 */
__STATIC_INLINE uint32_t DrvUartIsFramingErrorActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_FE) >> UART_LSR_FE_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsBreakInterruptActive(UartTypedef* uart_instance)
 * @brief Check if there is a break sequence on the serial input data
 * 
 * @param[in] uart_instance UART instance
 * @return Break Interrupt bit
 * @retval 0 Break not interrupt
 * @retval 1 Break Interrupt
 */
__STATIC_INLINE uint32_t DrvUartIsBreakInterruptActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_BI) >> UART_LSR_BI_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsThreActive(UartTypedef* uart_instance)
 * @brief Check if THR is empty
 * 
 * @param[in] uart_instance UART instance
 * @return Transmit holding register empty bit
 * @retval 0 Holding register not empty
 * @retval 1 holding register empty
 */
__STATIC_INLINE uint32_t DrvUartIsThreActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_THRE) >> UART_LSR_THRE_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsTemtActive(UartTypedef* uart_instance)
 * @brief Check if THR and TSR are both empty
 * 
 * @param[in] uart_instance UART instance
 * @return Transmitter ermpty bit
 * @retval 0 Transmitter not ermpty
 * @retval 1 Transmitter ermpty
 */
__STATIC_INLINE uint32_t DrvUartIsTemtActive(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->LSR, UART_LSR_TEMT) >> UART_LSR_TEMT_Pos;
}

/** @} UART_DRV_EF_Flag_Management */

/**
 * @defgroup UART_DRV_EF_IT_Management UART Interrupt Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE void DrvUartEnableErbfiIt(UartTypedef* uart_instance)
 * @brief Enable Received Data Available Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartEnableErbfiIt(UartTypedef* uart_instance) {
  SET_BIT(uart_instance->DLH_IER, UART_IER_ERBFI);
}

/**
 * @fn __STATIC_INLINE void DrvUartEnableEtbeiIt(UartTypedef* uart_instance)
 * @brief Enable Transmit Holding Register Empty Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartEnableEtbeiIt(UartTypedef* uart_instance) {
  SET_BIT(uart_instance->DLH_IER, UART_IER_ETBEI);
}

/**
 * @fn __STATIC_INLINE void DrvUartEnableElsiIt(UartTypedef* uart_instance)
 * @brief Enable Receiver Line Status Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartEnableElsiIt(UartTypedef* uart_instance) {
  SET_BIT(uart_instance->DLH_IER, UART_IER_ELSI);
}

/**
 * @fn __STATIC_INLINE void DrvUartEnableEdssiIt(UartTypedef* uart_instance)
 * @brief Enable Modem Status Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartEnableEdssiIt(UartTypedef* uart_instance) {
  SET_BIT(uart_instance->DLH_IER, UART_IER_EDSSI);
}

/**
 * @fn __STATIC_INLINE void DrvUartEnablePtimeIt(UartTypedef* uart_instance)
 * @brief Enable THRE Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartEnablePtimeIt(UartTypedef* uart_instance) {
  SET_BIT(uart_instance->DLH_IER, UART_IER_PTIME);
}

/**
 * @fn __STATIC_INLINE void DrvUartDisableErbfiIt(UartTypedef* uart_instance)
 * @brief Disable Received Data Available Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartDisableErbfiIt(UartTypedef* uart_instance) {
  CLEAR_BIT(uart_instance->DLH_IER, UART_IER_ERBFI);
}

/**
 * @fn __STATIC_INLINE void DrvUartDisableEtbeiIt(UartTypedef* uart_instance)
 * @brief Disable Transmit Holding Register Empty Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartDisableEtbeiIt(UartTypedef* uart_instance) {
  CLEAR_BIT(uart_instance->DLH_IER, UART_IER_ETBEI);
}

/**
 * @fn __STATIC_INLINE void DrvUartDisableElsiIt(UartTypedef* uart_instance)
 * @brief Disable Receiver Line Status Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartDisableElsiIt(UartTypedef* uart_instance) {
  CLEAR_BIT(uart_instance->DLH_IER, UART_IER_ELSI);
}

/**
 * @fn __STATIC_INLINE void DrvUartDisableEdssiIt(UartTypedef* uart_instance)
 * @brief Disable Modem Status Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartDisableEdssiIt(UartTypedef* uart_instance) {
  CLEAR_BIT(uart_instance->DLH_IER, UART_IER_EDSSI);
}

/**
 * @fn __STATIC_INLINE void DrvUartDisablePtimeIt(UartTypedef* uart_instance)
 * @brief Disable THRE Interrupt
 * 
 * @param[in] uart_instance UART instance
 */
__STATIC_INLINE void DrvUartDisablePtimeIt(UartTypedef* uart_instance) {
  CLEAR_BIT(uart_instance->DLH_IER, UART_IER_PTIME);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsErbfiItEnabled(UartTypedef* uart_instance)
 * @brief Check if the Received Data Available Interrupt is enabled or disabled
 * 
 * @param[in] uart_instance UART instance
 * @return ERBFI is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvUartIsErbfiItEnabled(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->DLH_IER, UART_IER_ERBFI) >> UART_IER_ERBFI_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsEtbeiItEnabled(UartTypedef* uart_instance)
 * @brief Check if the Transmit Holding Register Empty Interrupt is enabled or disabled
 * 
 * @param[in] uart_instance UART instance
 * @return ETBEI is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvUartIsEtbeiItEnabled(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->DLH_IER, UART_IER_ETBEI) >> UART_IER_ETBEI_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsElsiItEnabled(UartTypedef* uart_instance)
 * @brief Check if the Receiver Line Status Interrupt is enabled or disabled
 * 
 * @param[in] uart_instance UART instance
 * @return ELSI is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvUartIsElsiItEnabled(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->DLH_IER, UART_IER_ELSI) >> UART_IER_ELSI_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsEdssiItEnabled(UartTypedef* uart_instance)
 * @brief Check if the Modem Status Interrupt is enabled or disabled
 * 
 * @param[in] uart_instance UART instance
 * @return EDSSI is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvUartIsEdssiItEnabled(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->DLH_IER, UART_IER_EDSSI) >> UART_IER_EDSSI_Pos;
}

/**
 * @fn __STATIC_INLINE uint32_t DrvUartIsPtimeItEnabled(UartTypedef* uart_instance)
 * @brief Check if the THRE Interrupt is enabled or disabled
 * 
 * @param[in] uart_instance UART instance
 * @return PTIME is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvUartIsPtimeItEnabled(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->DLH_IER, UART_IER_PTIME) >> UART_IER_PTIME_Pos;
}

/** @} UART_DRV_EF_IT_Management */

/**
 * @defgroup UART_DRV_EF_Data_Management UART Data Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE uint8_t DrvUartReceiveData(UartTypedef* uart_instance)
 * @brief Read Receiver Data Register
 * 
 * @param[in] uart_instance UART instance
 * @return UART value between Min_Data=0x00 and Max_Data=0xFF
 */
__STATIC_INLINE uint8_t DrvUartReceiveData(UartTypedef* uart_instance) {
  return READ_BIT(uart_instance->RBR_THR_DLL, UART_RBR);
}

/**
 * @fn __STATIC_INLINE void DrvUartTransmitData(UartTypedef* uart_instance, uint8_t value)
 * @brief Transmit one byte data
 * 
 * @param[in] uart_instance UART instance
 * @param[in] value One byte data to transmit
 */
__STATIC_INLINE void DrvUartTransmitData(UartTypedef* uart_instance, uint8_t value) {
  WRITE_REG(uart_instance->RBR_THR_DLL, value);
  while (!READ_BIT(uart_instance->LSR, UART_LSR_THRE)) {}
}

/** @} UART_DRV_EF_Data_Management */

/**
 * @defgroup UART_DRV_EF_Init UART Initialization and De-initialization Exported Functions
 * @{
 */

/**
 * @fn ErrorStatus DrvUartDeInit(UartTypedef* uart_instance)
 * @brief De-initialize UART registers
 * 
 * @param[in] uart_instance UART instance
 * @return UART is de-initialized or not
 * @retval kSuccess UART registers are de-initialized
 * @retval kError UART registers are not de-initialized
 */
ErrorStatus DrvUartDeInit(UartTypedef* uart_instance);

/**
 * @fn ErrorStatus DrvUartInit(UartTypedef* uart_instance, DrvUartInitTypedef* uart_init_struct)
 * @brief Initialize UART registers according to the specified parameters in UART_InitStruct
 * 
 * @param[in] uart_instance UART instance
 * @param[in] uart_init_struct pointer to a DrvUartInitTypedef structure that contians the 
 *            configuration information for the specified UART peripheral 
 * @return UART is initialized or not
 * @retval kSuccess UART registers are initialized according to uart_init_struct content
 * @retval kError Problem occured during UART registers initialization
 */
ErrorStatus DrvUartInit(UartTypedef* uart_instance, DrvUartInitTypedef* uart_init_struct);

/**
 * @fn void DrvUartStructInit(DrvUartInitTypedef* uart_init_struct)
 * @brief Set each @ref DrvUartInitTypedef field to default value
 * 
 * @param[out] uart_init_struct pointer to a @ref DrvUartInitTypedef structure
 *             whose field will be set to default values
 */
void DrvUartStructInit(DrvUartInitTypedef* uart_init_struct);

/** @} UART_DRV_EF_Init */
/** @} UART_DRV_Exported_Functions */
/** @} UART_DRV */
/** @} GT9881_Drivers */
void Uart_SendFloat(float num, uint8_t dig);
void Usart_SendNum_Int16t(int16_t num);
void Usart_SendNum_Int32t(int32_t num);
void Uart_SendHex32(uint32_t date);
void Uart_SendHex16(uint16_t date);
void Uart_SendHex8(uint8_t date);
void Uart_SendString(uint8_t volatile *str);
void Uart_SendChar(char volatile *str);
void Uart_SendByte(uint8_t date);

#ifdef __cplusplus
}
#endif /* __cplusplus */

#endif /* GT98XX_DRIVERS_GT98XX_DRV_UART_H_ */
